Job Description

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Job Function

• Candidate will be responsible for design verification of next generation modem sub systems for mobile phones, wearables and IOT chips.
  Candidate will be working on ASIC designs on the latest technology nodes.
• This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies including simulation, emulation, GLS and Formal techniques.
• Candidate will require close interactions with Design, SoC , Validation, Synthesis PD teams for design convergence.
• Candidate must be able to take ownership of IP/Block/SS verification.
  Incumbent will be analyzing HW design spec and develop a verification test plan/strategy for it.
• He/She will work with design team on RTL debug during Pre-silicon HW development phase.
  
  Skills/Experience :
   
• 6-10 years of strong experience in digital front end ASIC design verification
• Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communcations or related field.
• Expertise in RTL verification in C/SystemVerilog/UVM of complex designs with multiple clock and power domains
• Being adaptable and have ability to work at various abstraction levels: Block/Core/IP/SS level.
• Demonstrate strong coding skills in System Verilog and UVM.
• Develop verification environment and testbench components such as BFMs and checkers.
• Ability to code Assertion for temporal logic testing.
• Scripting languages like Perl/Python and development test automation framework for regression automation
• Deep understanding of Code/Functional coverage report, identify coverage holes, ability to develop new tests and closing design coverage with design/systems team.
• Performance verification for throughput/latency analysis of Modem Usecases.
• Experience in low power verification methodology and clock domain crossing designs
• Experience of PA GLS verification of DC and PD PG Netlist.
• Familiarity with various bus protocols like AHB, AXI
• Experience with Formal Verification is a plus.
• Experience in Modem/Wireless IP verification on wireless technologies like NR, LTE, WCDMA, CDMA, WLAN, Bluetooth is a plus.
• Experience in post-Si debug is a plus
• Good documentation skills
• Should possess good communication skills to ensure effective interaction with Engineering Management and team members.
• Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision
  
  Responsibilities:
   
• Digital design verification working in close collaboration with Multi-site Teams across US and India and other Geos.
• Work in close coordination with Systems, Design, SoC team , SW team, Validation DFT teams to get the goals completed.
• Lead junior engineers and drive project planning and tracking.
• Developing the Verification Strategy, Testbench architecture and implementing the design verification plan and tests using SV/UVM/C.
• HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development, Regression analysis, bug-triage.
• Formal Verification using Jasper, VCF etc.
• Power Aware Verification on RTL and DC/PD Gate lebel Netlist.
• Conducting High-/Mid-/Low- level verification reviews, coverage closure and sign-off on block and Sub-system testing.
• Assisting SOC team with IP Integration testing at SOC level
• Post-Silicon Debugs in close collaboration with Design, Validation and SW teams.
• Self-Motivated to Execute the defined tasks almost independently with minimal guidanc

Minimum Qualifications

Education:

Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems

Work Experiences:

4 years Hardware Engineering experience or related work experience

Certifications:

Skills:

Preferred Qualifications

Education:

Work Experiences:

6 years Hardware Engineering experience or related work experience. ,1 years in a technical leadership role with or without direct reports. ,2 years experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. ,2 years experience utilizing schematic capture and circuit simulation software. ,2 years experience with circuit design (e.g., digital, analog, RF).

Certifications:

Skills:

Computer Science, DSP Architectures, Electrical Engineering, Optical Systems, Packaging Systems

Skills Required: Packaging,Project Planning