Job
Description
Hi ALL,
Greetings from Skandysys
We are currently hiring potential STA Engineer, who are having min 2 year experience for our substantial ongoing and upcoming projects.
Job location :Hyderabad.
Clients : Qualcomm, Synopsis, Micron, NXP, Microchip, Intel, Samsung, AMS, Broadcom, Cypress/Infineon, Netra dyne, On semi, SiFive
Job Overview:
- Should be very strong in Synthesis & Timing concepts
- Should have knowledge of DC-topo, RTL Compiler or talus
- Should have handled both block and top level.
- Hands-on experience of working on technology nodes like 28nm, 20nm, 14nm,10nm
- Should have done both pre and post layout STA Flow, Timing Closure, LEC, constraint defining
Also share the following details:
CTC:
ECTC:
Notice period/Last working day(LWD):
Offers in hand, if any:
The remuneration and perks are unmatchable in the market.
Waiting for your positive outlook.
If interested, reply with updated CV
M: 9810987353
Role Technical Lead Industry Type Electronic Components / Semiconductors Functional Area Engineering - Software Employment Type Role Category Software Development Education UG : Any Graduate PG : Doctorate : Key Skills STA Timing Analysis Signal Integrity Synthes is Timing Floor Planning
Hyderabad/Secunderabad, Chennai, Bangalore/Bengaluru, Trivandrum/Thiruvananthapuram